- Written by Deepak Sebastian
- Posted on March 21, 2025
- Updated on March 21, 2025
- 110 Views
This feature adds support for Layer1-only front panel Ethernet ports on 7130 devices (containing a layer1 crosspoint chip) to participate in LLDP. As of 4.33.1F only internal Switch interfaces on ASICs/FPGAs participate in the LLDP protocol. The neighbor also only sees these internal ports from the switch. Customers who really care about/rely on LLDP information of the front panel Ethernet ports, especially for making cabling changes, would need to translate the internal interface to the appropriate Ethernet port using the show l1 path output.
- Written by Deepak Sebastian
- Posted on August 31, 2023
- Updated on April 1, 2025
- 6351 Views
Agile ports allow users to connect 40G interfaces on 7130 products utilizing multiple SFP ports per 40G capable interface. This enables 40G capable applications, such as MetaConnect and MetaWatch, to operate at that speed.
- Written by Deepak Sebastian
- Posted on August 18, 2022
- Updated on April 1, 2025
- 8576 Views
Arista’s DCS-7130LBR series of switches are powerful network devices designed for ultra latency applications along with a wealth of networking features.
- Written by Deepak Sebastian
- Posted on December 20, 2019
- Updated on April 27, 2020
- 10289 Views
This feature adds support for offloading BFD Transmit path to hardware (ASIC) for specific types of BFD sessions.
- Written by Deepak Sebastian
- Posted on November 12, 2019
- Updated on May 7, 2024
- 11257 Views
This feature adds support for offloading BFD Transmit path to hardware (ASIC) for specific types of BFD sessions. This will improve accuracy of transmit timer implementations for BFD (especially with fast timers like 50 ms) and relieve pressure on the main CPU in scenarios of scale.
- Written by Deepak Sebastian
- Posted on August 17, 2018
- Updated on February 6, 2022
- 8223 Views
Network operators have to monitor all kinds of information on the health of their networking equipment like