- Written by Deepak Sebastian
- Posted on August 31, 2023
- Updated on October 9, 2024
- 5034 Views
Agile ports allow users to connect 40G interfaces on 7130 products utilizing multiple SFP ports per 40G capable interface. This enables 40G capable applications, such as MetaConnect and MetaWatch, to operate at that speed.
- Written by David Joseph
- Posted on August 31, 2023
- Updated on October 9, 2024
- 4397 Views
Arista’s DCS-7130B series of switches are network devices designed for ultra low-latency applications along with a suite of networking features.
- Written by Deepak Sebastian
- Posted on August 18, 2022
- Updated on October 9, 2024
- 7230 Views
Arista’s DCS-7130LBR series of switches are powerful network devices designed for ultra latency applications along with a wealth of networking features.
- Written by Nelson Perez
- Posted on June 5, 2023
- Updated on October 9, 2024
- 4828 Views
Arista's 7130 Connect Series of Layer 1+ switches are powerful network devices that allow for dynamic connections between various layer 1 components on the system, such as the front panel, FPGA, and ASIC ports.
- Written by Andy Cheng
- Posted on January 3, 2023
- Updated on October 9, 2024
- 6013 Views
4.29.1F adds Latency Analyzer (LANZ) support to the Arista SwitchApp on 7130 series. LANZ monitors SwitchApp internal buffer congestion. When the number of bytes in a buffer is over a high threshold, a congestion start event is created. When the number of bytes in a buffer is below a low threshold, a congestion end event occurs. LANZ on SwitchApp does not report any congestion update as the buffer sizes are too small for it to be meaningful. As SwitchApp comes in different profiles, each profile has a different hardware behavior due to the underlying architectural difference.
- Written by John Clarke
- Posted on December 20, 2021
- Updated on October 9, 2024
- 11133 Views
Arista's 7130 Connect Series of Layer 1+ switches are powerful network devices designed for ultra low latency and offer a wealth of integrated management features and functionalities.
- Written by Alejandro Schwoykoski
- Posted on December 22, 2021
- Updated on November 14, 2024
- 11571 Views
MetaMux is an FPGA-based feature available on Arista’s 7130 platforms. It performs ultra-low latency Ethernet packet multiplexing with or without packet contention queuing. The port to port latency is a function of the selected MetaMux profile, front panel ingress port, front panel egress port, FPGA connector ingress port, and platform being used.
- Written by David Mirabito
- Posted on December 30, 2021
- Updated on November 19, 2024
- 15156 Views
MetaWatch is an FPGA-based feature available for Arista 7130 Series platforms. It provides precise timestamping of packets, aggregation and deep buffering for Ethernet links. Timestamp information and other metadata such as device and port identifiers are appended to the end of the packet as a trailer.
- Written by Diego Asturias
- Posted on January 30, 2024
- Updated on November 13, 2024
- 3756 Views
MultiAccess is an FPGA-based feature available on certain Arista 7130 platforms. It performs low-latency Ethernet multiplexing with optional packet contention queuing, storm control, VLAN tunneling, and packet access control. The interface to interface latency is a function of the selected MultiAccess profile, front panel interfaces, MultiAccess interfaces, configuration settings, and platform being used.
- Written by Prasanna Parthasarathy
- Posted on December 23, 2021
- Updated on October 28, 2024
- 12702 Views
SwitchApp is an FPGA-based feature available on Arista’s 7130LB-Series and 7132LB-Series platforms. It performs ultra low latency Ethernet packet switching. Its packet switching feature set, port count, and port to port latency are a function of the selected SwitchApp profile. Detailed latency measurements are available in the userguide on the Arista Support site.
- Written by Travis Hammond
- Posted on July 29, 2024
- Updated on October 9, 2024
- 1053 Views
Arista’s DCS-7130LBR series of switches are capable of supporting SwitchApp, which is an FPGA-based L2/L3 switch. However, as the switch would then contain two switch ASICs (one traditional switch ASIC, and one FPGA-based switch) physically upon loading the SwitchApp application, there are certain limitations and nuances along with its usage. This document intends to explain some of the details.